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general description the max5477/max5478/max5479 nonvolatile, dual, linear-taper, digital potentiometers perform the function of a mechanical potentiometer, but replace the mechanics with a simple 2-wire digital interface. each device performs the same function as a discrete poten- tiometer or variable resistor and has 256 tap points. the devices feature an internal, nonvolatile eeprom used to store the wiper position for initialization during power-up. a write-protect feature prevents accidental overwrites of the eeprom. the fast-mode i 2 c-compati- ble serial interface allows communication at data rates up to 400kbps, minimizing board space and reducing interconnection complexity in many applications. three address inputs allow a total of eight unique address combinations. the max5477/max5478/max5479 provide three nomi- nal resistance values: 10k ? (max5477), 50k ? (max5478), or 100k ? (max5479). the nominal resistor temperature coefficient is 70ppm/c end-to-end and 10ppm/c ratiometric. the low temperature coefficient makes the devices ideal for applications requiring a low- temperature-coefficient variable resistor, such as low- drift, programmable gain-amplifier circuit configurations. the max5477/max5478/max5479 are available in 16- pin 3mm x 3mm x 0.8mm tqfn and 14-pin 4.4mm x 5mm tssop packages. these devices operate over the extended -40c to +85c temperature range. applications mechanical potentiometer replacement low-drift programmable-gain amplifiers volume control liquid-crystal display (lcd) contrast control features power-on recall of wiper position from nonvolatile memory eeprom write protection tiny 3mm x 3mm x 0.8mm thin qfn package 70ppm/c end-to-end resistance temperature coefficient 10ppm/c ratiometric temperature coefficient fast 400kbps i 2 c-compatible serial interface 1 a (max) static supply current single-supply operation: +2.7v to +5.25v 256 tap positions per potentiometer 0.5 lsb dnl in voltage-divider mode 1 lsb inl in voltage-divider mode max5477/max5478/max5479 dual, 256-tap, nonvolatile, i 2 c-interface, digital potentiometers ________________________________________________________________ maxim integrated products 1 19-3379; rev 5; 11/11 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. pin configurations appear at end of data sheet. evaluation kit available ordering information/selector guide part temp range pin-package end-to-end resistance (k ) top mark max5477 ete+t -40c to +85c 16 tqfn-ep* 10 abo max5477eud+ -40c to +85c 14 tssop 10 max5478 ete+t -40c to +85c 16 tqfn-ep* 50 abp max5478eud+ -40c to +85c 14 tssop 50 max5479 ete+t -40c to +85c 16 tqfn-ep* 100 abq max5479eud+ -40c to +85c 14 tssop 100 + denotes a lead(pb)-free/rohs-compliant package. t = tape and reel. * ep = exposed pad. functional diagram max5477 max5478 max5479 8-bit shift register por 16-bit latch 16-bit nv memory sda scl wp a0 a1 a2 8 256 position decoder 8 8 256 256 position decoder 256 ha wa la hb wb lb v dd gnd i 2 c interface
max5477/max5478/max5479 dual, 256-tap, nonvolatile, i 2 c-interface, digital potentiometers 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v dd = +2.7v to +5.25v, h_ = v dd , l_ = gnd, t a = -40c to +85c, unless otherwise noted. typical values are at v dd = +5v, t a = +25c.) (note 2) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. sda, scl, v dd to gnd .........................................-0.3v to +6.0v all other pins to gnd.................................-0.3v to (v dd + 0.3v) maximum continuous current into h_, l_, and w_ max5477...................................................................... 5.0ma max5478...................................................................... 1.3ma max5479...................................................................... 0.6ma continuous power dissipation (t a = +70c) 16-pin tqfn (derate 17.5mw/c above +70c) .......1398mw 14-pin tssop (derate 9.1mw/c above +70c) .........727mw operating temperature range ...........................-40c to +85c maximum junction temperature .....................................+150c storage temperature range .............................-65c to +150c lead temperature (soldering, 10s) .................................+300c soldering temperature (reflow) .......................................+260c package thermal characteristics (note 1) tqfn junction-to-ambient thermal resistance ( ja ) ........57.2c/w junction-to-case thermal resistance ( jc ) ................40c/w tssop junction-to-ambient thermal resistance ( ja ) ......100.4c/w junction-to-case thermal resistance ( jc ) ................30c/w parameter symbol conditions min typ max units dc performance (voltage-divider mode) resolution 256 taps integral nonlinearity inl (note 3) 1 lsb differential nonlinearity dnl (note 3) 0.5 lsb dual code matching r0 and r1 set to same code (all codes) 1 lsb end-to-end resistance temperature coefficient tc r 70 ppm/c ratiometric resistance temperature coefficient 10 ppm/c max5477 -4 max5478 -0.6 full-scale error max5479 -0.3 lsb max5477 4 max5478 0.6 zero-scale error max5479 0.3 lsb dc performance (variable-resistor mode) v dd = 3v 3 integral nonlinearity (note 4) inl v dd = 5v 1.5 lsb max5477 1 max5478 1 differential nonlinearity (note 4) dnl max5479 1 lsb note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial .
max5477/max5478/max5479 dual, 256-tap, nonvolatile, i 2 c-interface, digital potentiometers _______________________________________________________________________________________ 3 electrical characteristics (continued) (v dd = +2.7v to +5.25v, h_ = v dd , l_ = gnd, t a = -40c to +85c, unless otherwise noted. typical values are at v dd = +5v, t a = +25c.) (note 2) parameter symbol conditions min typ max units dual code matching r0 and r1 set to same code (all codes), v dd = 3v or 5v 3 lsb dc performance (resistor characteristics) wiper resistance r w (note 5) 325 675 wiper capacitance c w 10 pf max5477 7.5 10 12.5 max5478 37.5 50 62.5 end-to-end resistance r hl max5479 75 100 125 k digital inputs v dd = 3.4v to 5.25v 2.4 input high voltage (note 6) v ih v dd < 3.4v 0.7 x v dd v input low voltage v il (note 6) 0.8 v output low voltage v ol i sink = 3ma 0.4 v wp pullup resistance i wp 255 k input leakage current i leak 1 a input capacitance 5 pf dynamic characteristics crosstalk ha = 1khz (0 to v dd ), la = gnd, lb = gnd, measure wb -75 db max5477 400 max5478 100 3db bandwidth (note 7) max5479 50 khz total harmonic distortion plus noise thd+n h_ = 1v rms , f = 1khz, l_ = gnd, measure w_ 0.003 % nonvolatile memory reliability data retention t a = +85c 50 years t a = +25c 200,000 endurance t a = +85c 50,000 stores power supply power-supply voltage v dd 2.70 5.25 v writing to eeprom, digital inputs at gnd or v dd , t a = +25c (note 8) 250 400 wp = gnd 15 20.6 supply current i dd normal operation, digital inputs at gnd or v dd , t a = +25c wp = v dd 0.5 1 a
max5477/max5478/max5479 dual, 256-tap, nonvolatile, i 2 c-interface, digital potentiometers 4 _______________________________________________________________________________________ note 2: all devices are production tested at t a = +25c and are guaranteed by design and characterization for -40c < t a < +85c. note 3: the dnl and inl are measured with the potentiometer configured as a voltage-divider with h_ = v dd and l_ = gnd. the wiper terminal is unloaded and measured with a high-input-impedance voltmeter. note 4: the dnl and inl are measured with the potentiometer configured as a variable resistor. h_ is unconnected and l_ = gnd. for v dd = +5v, the wiper is driven with 400a (max5477), 80a (max5478), or 40a (max5479). for v dd = +3v, the wiper is driven with 200a (max5477), 40a (max5478), or 20a (max5479). note 5: the wiper resistance is measured using the source currents given in note 3. note 6: the devices draw current in excess of the specified supply current when the digital inputs are driven with voltages between (v dd - 0.5v) and (gnd + 0.5v). see supply current vs. digital input voltage in the typical operating characteristics . note 7: wiper at midscale with a 10pf load (dc measurement). l_ = gnd, an ac source is applied to h_, and the w_ output is measured. a 3db bandwidth occurs when the ac w_/h_ value is 3db lower than the dc w_/h_ value. note 8: the programming current exists only during power-up and eeprom writes. note 9: the scl clock period includes rise and fall times (t r = t f ). all digital input signals are specified with t r = t f = 2ns and timed from a voltage level of (v il + v ih ) / 2. note 10: digital timing is guaranteed by design and characterization, and is not production tested. note 11: this is measured from the stop pulse to the time it takes the output to reach 50% of the output step size (divider mode). it is measured with a maximum external capacitive load of 10pf. note 12: an appropriate bus pullup resistance must be selected depending on board capacitance. refer to the i 2 c-bus specifica- tion document linked to this web address: www.semiconductors.philips.com/acrobat/literature/9398/39340011.pdf note 13: the idle time begins from the initiation of the stop pulse. parameter symbol conditions min typ max units analog section max5477 325 max5478 500 wiper settling time (note 11) t ws max5479 1000 ns digital section scl clock frequency f scl 400 khz setup time for start condition t su:sta 0.6 s hold time for start condition t hd:sta 0.6 s scl high time t high 0.6 s scl low time t low 1.3 s data setup time t su:dat 100 ns data hold time t hd:dat 0 0.9 s sda, scl rise time t r 300 ns sda, scl fall time t f 300 ns setup time for stop condition t su:sto 0.6 s bus free time between stop and start condition t buf minimum power-up rate = 0.2v/s 1.3 s pulse width of spike suppressed t sp 50 ns capacitive load for each bus line c b (note 12) 400 pf write nv register busy time (note 13) 12 ms timing characteristics (v dd = +2.7v to +5.25v, h_ = v dd , l_ = gnd, t a = -40c to +85c, unless otherwise noted. typical values are at v dd = +5v, t a = +25c. see figure 1.) (notes 9 and 10)
max5477/max5478/max5479 dual, 256-tap, nonvolatile, i 2 c-interface, digital potentiometers _______________________________________________________________________________________ 5 0 0.2 0.6 0.4 0.8 1.0 -40 10 -15 35 60 85 supply current vs. temperature (max5477) max5477/78/79 toc01 temperature ( c) supply current ( a) v cc = 5v wp = v dd v cc = 3v 5 7 11 9 13 15 -40 10 -15 35 60 85 supply current vs. temperature max5477/78/79 toc1a temperature ( c) supply current ( a) v cc = 5v wp = gnd v cc = 3v 0 100 50 200 150 300 250 350 450 400 500 06496 32 128 160 192 224 256 wiper resistance vs. input code max5477/78/79 toc02 input code wiper resistance ( ? ) 200ns/div tap-to-tap switching transient sda 2v/div w_ 50mv/div max5477/78/79 toc03 max5477 c l = 10pf h_ = v dd from tap 00 to tap 04 tap-to-tap switching transient max5477/78/79 toc04 1 s/div sda 2v/div w_ 20mv/div max5478 c l = 10pf h_ = v dd from tap 00 to tap 04 tap-to-tap switching transient max5477/78/79 toc05 400ns/div sda 2v/div w_ 20mv/div max5479 c w_ = 10pf h_ = v dd from tap 00 to tap 04 2 s/div wiper transient at power-on v dd 2v/div w_ 1v/div max5477/78/79 toc06 max5477 tap = 128 wiper transient at power-on max5477/78/79 toc07 4 s/div v dd 2v/div w_ 1v/div max5478 tap = 128 wiper transient at power-on max5477/78/79 toc08 2 s/div v dd 2v/div w_ 1v/div max5479 tap = 128 typical operating characteristics (v dd = +5v, h_ = v dd , l_ = gnd, t a = +25c, unless otherwise noted.)
max5477/max5478/max5479 dual, 256-tap, nonvolatile, i 2 c-interface, digital potentiometers 6 _______________________________________________________________________________________ -0.3 -0.2 -0.1 0 0.1 0.2 0.3 064 32 96 128 160 192 224 256 differential nonlinearity vs. code (vdm mode) max5477/78/79 toc10 code dnl (lsb) max5477 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 064 32 96 128 160 192 224 256 integral nonlinearity vs. code (vdm mode) max5477/78/79 toc11 code inl (lsb) max5478 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 064 32 96 128 160 192 224 256 differential nonlinearity vs. code (vdm mode) max5477/78/79 toc12 code dnl (lsb) max5478 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 064 32 96 128 160 192 224 256 integral nonlinearity vs. code (vrm mode) max5477/78/79 toc13 code inl (lsb) max5478 -0.10 -0.08 -0.04 0 0.02 0.06 0.10 064 32 96 128 160 192 224 256 differential nonlinearity vs. code (vrm mode) max5477/78/79 toc14 code dnl (lsb) -0.06 -0.02 0.08 0.04 max5478 -0.20 -0.12 -0.16 -0.04 -0.08 0.04 0 0.08 0.16 0.12 0.20 06496 32 128 160 192 224 256 integral nonlinearity vs. code (vdm mode) max5477/78/79 toc15 code inl (lsb) max5479 -0.14 -0.02 -0.04 -0.06 -0.08 -0.10 -0.12 0 0.04 0.02 0.10 0.08 0.12 0.06 0.14 064 32 96 128 160 192 224 256 differential nonlinearity vs. code (vdm mode) max5477/78/79 toc16 code dnl (lsb) max5479 -0.20 -0.12 -0.16 -0.04 -0.08 0.04 0 0.08 0.16 0.12 0.20 06496 32 128 160 192 224 256 integral nonlinearity vs. code (vrm mode) max5477/78/79 toc17 code inl (lsb) max5479 typical operating characteristics (continued) (v dd = +5v, h_ = v dd , l_ = gnd, t a = +25c, unless otherwise noted.) 0 0.05 0.15 0.10 0.25 0.30 0.20 0.35 06496 32 128 160 192 224 256 integral nonlinearity vs. code (vdm mode) max5477/78/79 toc09 code inl (lsb) max5477
max5477/max5478/max5479 crosstalk vs. frequency (max5478) max5477/78/79 toc20 frequency (khz) crosstalk (db) 100 10 1 0.1 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 -100 0.01 1000 c w_ = 10pf crosstalk vs. frequency (max5479) max5477/78/79 toc21 frequency (khz) crosstalk (db) 1000 100 10 1 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 -100 0.1 10,000 c w_ = 10pf frequency (khz) gain (db) midscale wiper response vs. frequency (max5477) 1 0 -1 -2 -3 -4 -5 -6 -7 -8 1 0.1 10 100 1000 max5477/78/79 toc22 c w_ = 10pf c w_ = 50pf midscale wiper response vs. frequency (max5478) max5477 toc23 frequency (khz) gain (db) 100 10 1 -7 -6 -5 -4 -3 -2 -1 0 1 2 -8 0.1 1000 c w_ = 50pf c w_ = 10pf total harmonic distortion plus noise vs. frequency (max5478) max5477/78/79 toc26 frequency (khz) thd+n (%) 10 1 0.1 0.001 0.01 0.1 1 10 0.0001 0.01 100 midscale dual, 256-tap, nonvolatile, i 2 c-interface, digital potentiometers _______________________________________________________________________________________ 7 -0.20 -0.12 -0.16 -0.04 -0.08 0.04 0 0.08 0.16 0.12 0.20 06496 32 128 160 192 224 256 differential nonlinearity vs. code (vrm mode) max5477/78/79 toc18 code dnl (lsb) max5479 frequency (khz) crosstalk (db) crosstalk vs. frequency (max5477) 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 0.1 1 10 100 1000 10,000 max5477/78/79 toc19 cw_ = 10pf midscale wiper response vs. frequency (max5479) max5477/78/79 toc24 frequency (khz) gain (db) 100 10 1 -4 -3 -2 -1 0 1 2 -5 0.1 1000 c w_ = 50pf c w_ = 10pf frequency (khz) thd+n (%) total harmonic distortion plus noise vs. frequency (max5477) 1 0.1 0.01 0.001 0.01 0.1 1 10 100 max5477/78/79 toc25 midscale typical operating characteristics (continued) (v dd = +5v, h_ = v dd , l_ = gnd, t a = +25c, unless otherwise noted.)
max5477/max5478/max5479 dual, 256-tap, nonvolatile, i 2 c-interface, digital potentiometers 8 _______________________________________________________________________________________ typical operating characteristics (continued) (v dd = +5v, h_ = v dd , l_ = gnd, t a = +25c, unless otherwise noted.) total harmonic distortion plus noise vs. frequency (max5479) max5477/78/79 toc27 frequency (khz) thd+n (%) 10 1 0.1 0.001 0.01 0.1 1 10 0.0001 0.01 100 midscale -0.6 -0.2 -0.4 0.2 0 0.4 0.6 -40 85 end-to-end resistance % change vs. temperature (max5477) max5477/78/79 toc28 temperature ( c) end-to-end resistance change (%) 10 -15 35 60 -0.5 -0.2 -0.3 -0.4 -0.1 0 0.1 0.2 0.3 0.4 0.5 -40 10 -15 35 60 85 end-to-end resistance % change vs. temperature (max5478) max5477/78/79 toc29 temperature ( c) end-to-end resistance change (%) -0.5 -0.2 -0.3 -0.4 -0.1 0 0.1 0.2 0.3 0.4 0.5 -40 10 -15 35 60 85 end-to-end resistance % change vs. temperature (max5479) max5477/78/79 toc30 temperature ( c) end-to-end resistance change (%) 0 350 300 250 400 450 550 500 600 0 1.0 0.5 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 supply current vs. digital input voltage max5477/78/79 toc31 digital input voltage (v) supply current ( a) wp = gnd v cc = 5v v cc = 3v 200 150 100 50
max5477/max5478/max5479 dual, 256-tap, nonvolatile, i 2 c-interface, digital potentiometers _______________________________________________________________________________________ 9 pin description pin tssop thin qfn name function 1 15 ha potentiometer a high terminal 2 14 wa potentiometer a wiper terminal 3 13 la potentiometer a low terminal 4 12 hb potentiometer b high terminal 5 11 wb potentiometer b wiper terminal 6 10 lb potentiometer b low terminal 79wp write-protect input. connect to gnd to allow changes to the wiper position and the data stored in the eeprom. connect to v dd or leave unconnected to enable the write protection of the eeprom. see the write protect (wp) section for operating instructions. 8 7 gnd ground 9 6 a2 address input 2. connect to v dd or gnd (see table 1). 10 5 a1 address input 1. connect to v dd or gnd (see table 1). 11 4 a0 address input 0. connect to v dd or gnd (see table 1). 12 3 sda i 2 c serial data 13 2 scl i 2 c clock input 14 1 v dd power-supply input. connect a +2.7v to +5.25v power supply to v dd and bypass v dd to gnd with a 0.1f capacitor installed as close to the device as possible. 8, 16 n.c. no connection. do not connect. ep ep exposed paddle. do not connect. sda scl start condition (s) t hd:sta t r t f t high t low t su:dat t hd:dat repeated start condition (sr) t hd:sta t su:sta t su:sto t buf stop condition (p) start condition (s) acknowledge (a) parameters are measured from 30% to 70%. figure 1. i 2 c serial-interface timing diagram
max5477/max5478/max5479 dual, 256-tap, nonvolatile, i 2 c-interface, digital potentiometers 10 ______________________________________________________________________________________ detailed description the max5477/max5478/max5479 contain two resistor arrays with 255 elements in each array. the max5477 has a total end-to-end resistance of 10k ? , the max5478 has an end-to-end resistance of 50k ? , and the max5479 has an end-to-end resistance of 100k ? . the max5477/max5478/max5479 provide access to the high, low, and wiper terminals for a standard volt- age-divider configuration. connect h_, l_, and w_ in any desired configuration as long as their voltages remain between gnd and v dd . a simple 2-wire i 2 c-compatible serial interface moves the wiper among the 256 tap points (figure 2). a non- volatile memory stores the wiper position and recalls the stored wiper position upon power-up. the non- volatile memory is guaranteed for 50 years for wiper data retention and up to 200,000 wiper store cycles. analog circuitry the max5477/max5478/max5479 consist of two resistor arrays with 255 resistive elements; 256 tap points are accessible to the wipers, along the resistor string between h_ and l_. the wiper tap point is selected by programming the potentiometer through the i 2 c inter- face. an address byte, a command byte, and 8 data bits program the wiper position for each potentiometer. the h_ and l_ terminals of the max5477/max5478/ max5479 are similar to the two end terminals of a mechanical potentiometer. the max5477/max5478/ max5479 feature power-on reset circuitry that loads the wiper position from the nonvolatile memory at power-up. 256-position decoder h_ l_ r 255 s 255 s 254 s 3 s 2 s 1 s 256 r 254 r 2 r 1 w_ r w wiper code 02h figure 2. potentiometer configuration address inputs a2 a1 a0 slave address gnd gnd gnd 0101000 gnd gnd v dd 0101001 gnd v dd gnd 0101010 gnd v dd v dd 0101011 v dd gnd gnd 0101100 v dd gnd v dd 0101101 v dd v dd gnd 0101110 v dd v dd v dd 0101111 table 1. slave addresses
max5477/max5478/max5479 dual, 256-tap, nonvolatile, i 2 c-interface, digital potentiometers ______________________________________________________________________________________ 11 digital interface the max5477/max5478/max5479 feature an internal, nonvolatile eeprom that stores the wiper state for ini- tialization during power-up. the shift register decodes the command and address bytes, routing the data to the proper memory registers. data written to a volatile memory register immediately updates the wiper posi- tion, or writes data to a nonvolatile register for storage (see table 3). the volatile register retains data as long as the device is powered. removing power clears the volatile regis- ter. the nonvolatile register retains data even after power is removed. upon power-up, the power-on reset circuitry controls the transfer of data from the non- volatile register to the volatile register. write protect (wp) a write-protect feature prevents accidental overwriting of the eeprom. connect wp to v dd or leave unconnected to prevent any eeprom write cycles. writing to the volatile register (vreg) while wp = 1 updates the wiper position with the protected data stored in the nonvolatile register (nvreg). connect wp to gnd to allow write commands to the eeprom and to update the wiper position from either the value in the eeprom or directly from the i 2 c interface (table 2). connecting wp to gnd increases the supply current by 19.6a (max). to ensure a fail-safe, write-protect feature, write the data to be protected to both the nonvolatile and volatile registers before pulling wp high. releasing wp (wp = 0) and sending partial or invalid i 2 c commands (such as single-byte address polling) can load the volatile address byte command byte data byte 1 2 3 4 5 6 7 8 9 10111213 14151617 18 1920 21222324 2526 27 scl cycle number start (s) a6 a5 a4 a3 a2 a1 a0 ack (a) tx nv v r3 r2 r1 r0 ack (a) d7 d6 d5 d4 d3 d2 d1 d0 ack (a) stop (p) notes vreg 0101a2a1a00 00010001 d7d6d5d4d3d2d1d0 nvreg 0101a2a1a00 00100001 d7d6d5d4d3d2d1d0 nvregxvreg 0101a2a1a00 01100001 d7d6d5d4d3d2d1d0 vregxnvreg 0101a2a1a00 01010001 d7d6d5d4d3d2d1d0 wiper a only vreg 0101a2a1a00 00010010 d7d6d5d4d3d2d1d0 nvreg 0101a2a1a00 00100010 d7d6d5d4d3d2d1d0 nvregxvreg 0101a2a1a00 01100010 d7d6d5d4d3d2d1d0 vregxnvreg 0101a2a1a00 01010010 d7d6d5d4d3d2d1d0 wiper b only vreg 0101a2a1a00 00010011 d7d6d5d4d3d2d1d0 nvreg 0101a2a1a00 00100011 d7d6d5d4d3d2d1d0 nvregxvreg 0101a2a1a00 01100011 d7d6d5d4d3d2d1d0 vregxnvreg 0101a2a1a00 01010011 d7d6d5d4d3d2d1d0 wipers a and b table 3. command byte summary command wp = 0 wp = 1 write to vreg i 2 c data is written to vreg. wiper position updates with i 2 c data. no change to nvreg. copy nvreg to vreg. wiper position updates with nvreg data. no change to nvreg. write to nvreg no change to vreg or wiper position. i 2 c data is written to nvreg. no change to vreg or wiper position. no change to nvreg. copy nvreg to vreg copy nvreg to vreg. wiper position updates with nvreg data. no change to nvreg. copy nvreg to vreg. wiper position updates with nvreg data. no change to nvreg. copy vreg to nvreg copy vreg to nvreg. no change to vreg or wiper position. no change to vreg or wiper position. no change to nvreg. table 2. write-protect behavior of vreg and nvreg
max5477/max5478/max5479 dual, 256-tap, nonvolatile, i 2 c-interface, digital potentiometers 12 ______________________________________________________________________________________ register with input shift register data and change the wiper position. use valid 3-byte i 2 c commands for proper operation. this precautionary operation is nec- essary only when transitioning from write protected (wp = 1) to not write protected (wp = 0). serial addressing the max5477/max5478/max5479 operate as slave devices that send and receive data through an i 2 c-/ smbus-compatible 2-wire serial interface. the inter- face uses a serial data access (sda) line and a serial clock line (scl) to achieve bidirectional communication between master(s) and slave(s). a master, typically a microcontroller, initiates all data transfers to the max5477/max5478/max5479, and generates the scl clock that synchronizes the data transfer (figure 1). the max5477/max5478/max5479 sda line operates as both an input and an open-drain output. the sda line requires a pullup resistor, typically 4.7k ? . the max5477/max5478/max5479 scl line operates only as an input. the scl line requires a pullup resistor (typ- ically 4.7k ? ) if there are multiple masters on the 2-wire interface, or if the master in a single-master system has an open-drain scl output. scl and sda should not exceed v dd in a mixed-voltage system, despite the open-drain drivers. each transmission consists of a start (s) condition (figure 3) sent by a master, followed by the max5477/max5478/max5479 7-bit slave address plus the nop/ w bit (figure 4), 1 command byte and 1 data byte, and finally a stop (p) condition (figure 3). start and stop conditions both scl and sda remain high when the interface is not busy. a master controller signals the beginning of a transmission with a start condition by transitioning sda from high to low while scl is high. the master controller issues a stop condition by transitioning the sda from low to high while scl is high, when it finishes communicating with the slave. the bus is then free for another transmission (figure 3). bit transfer one data bit is transferred during each clock pulse. the data on the sda line must remain stable while scl is high (figure 5). acknowledge the acknowledge bit is a clocked 9th bit that the recipient uses to handshake receipt of each byte of data (figure 6). thus, each byte transferred effectively requires 9 bits. the master controller generates the 9th clock pulse, and the recipient pulls down sda during the acknowledge clock pulse, so the sda line remains stable low during the high period of the clock pulse. slave address the max5477/max5478/max5479 have a 7-bit-long slave address (figure 4). the 8th bit following the 7-bit slave address is the nop/ w bit. set the nop/ w bit low for a write command and high for a no-operation command. the max5477/max5478/max5479 provide three address inputs (a0, a1, and a2), allowing up to eight devices to share a common bus (table 1). the first 4 bits (msbs) of the max5477/max5478/max5479 slave addresses are always 0101. a2, a1, and a0 set the next sda scl s start condition p stop condition figure 3. start and stop conditions msb start scl sda ack a0 a2 a1 101 0 lsb nop/w figure 4. slave address smbus is a trademark of intel corporation.
max5477/max5478/max5479 dual, 256-tap, nonvolatile, i 2 c-interface, digital potentiometers ______________________________________________________________________________________ 13 3 bits in the slave address. connect each address input to v dd or gnd to set these 3 bits. each device must have a unique address to share a common bus. message format for writing write to the max5477/max5478/max5479 by transmit- ting the devices slave address with nop/ w (8th bit) set to zero, followed by at least 1 byte of information (figure 7). the 1st byte of information is the command byte. the bytes received after the command byte are the data bytes. the 1st data byte goes into the internal register of the max5477/max5478/max5479 as select- ed by the command byte (figure 8). command byte use the command byte to select the source and desti- nation of the wiper data (nonvolatile or volatile memory registers) and swap data between nonvolatile and volatile memory registers (see table 3). command descriptions vreg: the data byte writes to the volatile memory reg- ister and the wiper position updates with the data in the volatile memory register. nvreg: the data byte writes to the nonvolatile memory register. the wiper position is unchanged. nvregxvreg: data transfers from the nonvolatile memory register to the volatile memory register (wiper position updates). sda data stable, data valid change of data allowed scl figure 5. bit transfer 1 scl start condition sda 289 clock pulse for acknowledgment acknowledge not acknowledge figure 6. acknowledge a 0 slave address command byte data byte acknowledge from max5477/max5478/max5479 nop/w 1 byte acknowledge from max5477/max5478/max5479 acknowledge from max5477/max5478/max5479 d15 d14 d13 d12 d11 d10 d9 d8 d1 d0 d3 d2 d5 d4 d7 d6 how control byte and data byte map into max5477/max5478/max5479 registers s a a p s a 0 slave address command byte acknowledge from max5477/max5478/max5479 nop/w acknowledge from max5477/max5478/max5479 d15 d14 d13 d12 d11 d10 d9 d8 command byte is stored on receipt of stop condition ap figure 7. command byte received figure 8. command and single data byte received
max5477/max5478/max5479 dual, 256-tap, nonvolatile, i 2 c-interface, digital potentiometers 14 ______________________________________________________________________________________ vregxnvreg: data transfers from the volatile memory register into the nonvolatile memory register. nonvolatile memory the internal eeprom consists of a 16-bit nonvolatile register that retains the value written to it prior to power down. the nonvolatile register is programmed with the midscale value at the factory. the nonvolatile memory is guaranteed for 50 years for wiper position retention and up to 200,000 wiper write cycles. a write-protect feature prevents accidental overwriting of the eeprom. connect wp to v dd or leave open to enable the write- protect feature. the wiper position only updates with the value in the eeprom when wp = v dd . connect wp to gnd to allow eeprom write cycles and to update the wiper position from nonvolatile memory or directly from the i 2 c serial interface. power-up upon power-up, the max5477/max5478/max5479 load the data stored in the nonvolatile memory register into the volatile memory register, updating the wiper position with the data stored in the nonvolatile memory register. this initialization period takes 10s. standby the max5477/max5478/max5479 feature a low-power standby mode. when the device is not being pro- grammed, it enters into standby mode and supply cur- rent drops to 500na (typ). applications information the max5477/max5478/max5479 are ideal for circuits requiring digitally controlled adjustable resistance, such as lcd contrast control (where voltage biasing adjusts the display contrast), or for programmable fil- ters with adjustable gain and/or cutoff frequency. positive lcd bias control figures 9 and 10 show an application where the max5477/max5478/max5479 provide an adjustable, positive lcd bias voltage. the op amp provides buffer- ing and gain to the resistor-divider network made by the potentiometer (figure 9) or by a fixed resistor and a variable resistor (see figure 10). programmable filter figure 11 shows the max5477/max5478/max5479 in a 1st-order programmable application filter. adjust the gain of the filter with r 2 , and set the cutoff frequency with r 3 . use the following equations to calculate the gain (a) and the -3db cutoff frequency (f c ): offset voltage and gain adjustment connect the high and low terminals of one potentiome- ter of a max5477 between the null inputs of a max410 and the wiper to the op amps positive supply to nullify the offset voltage over the operating tempera- ture range. install the other potentiometer in the feed- back path to adjust the gain of the max410 (figure 12). adjustable voltage reference figure 13 shows the max5477/max5478/max5479 used as the feedback resistors in multiple adjustable voltage reference applications. independently adjust the output voltages of the max6160 parts from 1.23v to v in - 0.2v by changing the wiper positions of the max5477/max5478/max5479. a r r f rc c =+ = 1 1 2 1 2 3 v out 30v 5v w_ h_ l_ max5477 max5478 max5479 max480 v out 30v 5v w_ h_ l_ max5477 max5478 max5479 max480 figure 9. positive lcd bias control using a voltage-divider figure 10. positive lcd bias control using a variable resistor
max5477/max5478/max5479 dual, 256-tap, nonvolatile, i 2 c-interface, digital potentiometers ______________________________________________________________________________________ 15 max6160 in 5v out adj gnd ha la wa v out1 in out adj gnd hb lb wb v out2 1/2 max5477 1/2 max5478 1/2 max5479 max6160 1/2 max5477 1/2 max5478 1/2 max5479 for the max5477 v out_ = 1.23v x 10k ? r for the max5478 v out_ = 1.23v x 50k ? r for the max5479 v out_ = 1.23v x 100k ? r where r = r hl x d / 256 and d = decimal value of wiper code rr figure 13. adjustable voltage reference 3 2 5v 7 4 1 6 8 max410 ha la wa r2 r1 hb lb wb 1/2 max5477 1/2 max5477 r 2 = r hl x d / 256 where r hl = end-to-end resistance and = d decimal value of wiper code figure 12. offset voltage adjustment circuit max5477 max5478 max5479 v in r 2 hb wb lb r 1 v out r 3 ha wa la c max410 v+ v- r 2 , r 3 = r hl x d / 256 where r hl = end-to-end resistance and d = decimal value of wiper code figure 11. programmable filter 16 1 2 3 4 12 11 10 9 15 14 13 5678 n.c. ha wa la hb wb lb wp scl sda a0 a1 a2 gnd n.c. v dd top view max5477 max5478 max5479 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v dd scl sda a0 hb la wa ha a1 a2 gnd wp lb wb tssop (4.4mm x 5mm) thin qfn (3mm x 3mm) max5477 max5478 max5479 + + pin configurations chip information process: bicmos package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package type package code outline no. land pattern no. 16 tqfn-ep t1633f+3 21-0136 90-0033 14 tssop u14+1 21-0066 90-0113
max5477/max5478/max5479 dual, 256-tap, nonvolatile, i 2 c-interface, digital potentiometers maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidanc e. 16 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 8/04 initial release 4 1/09 updated ordering information for lead-free information. 1 5 11/11 released tqfn packages, revised ordering information . 1C4, 15, 16

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